Author: acasper

Professor Tarek El-Ghazawi (ECE) and Professor Volker Sorger (ECE) are the principal investigator and co-principal investigator, respectively, on a four-year, $900K grant funded by the National Science Foundation (NSF). The project is titled “RAISE: The Reconfigurable Optical Computer (ROC)”. The ultimate goal of this bold interdisciplinary project is to engender a new class of reconfigurable computing devices. In specific, the objective is to create a nanophotonic analog reconfigurable computer (ROC) that is capable of computing out of first principles by solving those partial differential equations (PDEs) that are used for most simulations in science and engineering.

Profs. Volker Sorger and *Tarek El-Ghazawi (ECE)* are the principal investigator and co-principal investigator, respectively, on a three-year, $1.33m grant funded jointly by the National Science Foundation and the Semiconductor Research Corporation (SRC) under the highly competitive and prestigious Energy-Efficient Computing: from Devices to Architectures (E2CDA) program. The project is titled “Collaborative Research: Nanophotonic Neuromorphic Computing.”

Prof. Tarek El-Ghazawi is the general chair for the 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2018) that will be held in Washington, D.C. CCGrid will be held May 1-4, 2018.

ccgrid2018.seas.gwu.edu

Prof. Tarek El-Ghazawi is the general chair for the following conferences that will be held in Bangkok, Thailand. Conferences will be held December 18-20, 2017

 

hpcc2017.seas.gwu.edu	dss2017.seas.gwu.edu	smartcity2017.seas.gwu.edu

The workshop focusing on multicore programming for Intel Xeon Phi was held at GW. For more information please visit ipcc.seas.gwu.edu

Intel awarded Prof. Tarek El-Ghazawi funding in addition to software and hardware to establish an Intel Parallel Computing Center (IPCC) at GW.  The GW-IPCC will focus on advancing parallel programming for many-core chips, including locality-aware optimizations and new programming paradigms such as PGAS for many-core chips. For more information visit ipcc.seas.gwu.edu